{
  "cveId": "CVE-2026-89731",
  "url": "https://patchblox.com/security/cve/CVE-2026-89731",
  "summary": "CVE-2026-89731 is fixed in 37 products on 1 platform, first by DEBIAN-CVE-2026-89731, released September 23, 2026. It is not reported as exploited. Patch Radar priority: High.",
  "title": "linux: In the Linux kernel, the following vulnerability has been resolved:  cxl/ras: Fix cxl_rch_get_aer_info() out-of-bound...",
  "description": "In the Linux kernel, the following vulnerability has been resolved:  cxl/ras: Fix cxl_rch_get_aer_info() out-of-bounds AER register read  cxl_rch_get_aer_info() copies the RCH Downstream Port AER capability from the RCRB MMIO block using a readl() loop bounded by sizeof(struct aer_capability_regs). This struct is a software layout and its embedded struct pcie_tlp_log is larger than the on-wire AER capability. As a result the loop reads past the mapped AER register block.  The over-read also populates the software-only tail fields including header_log.header_len. An out-of-range header_len passed to pcie_print_tlp_log() can then loop past the header log buffer and cause a second out-of-bounds read.  The read was correct when introduced, but struct pcie_tlp_log has since grown (Header Log and TLP Prefix Log sizes, header_len and flit fields), so sizeof(struct aer_capability_regs) no longer matches the physical AER capability.  Bound the read to the physical AER registers, header through the 16 byte Header Log. Zero the destination first so the software-only fields are deterministic.",
  "published": "2026-09-11T20:20:03Z",
  "severity": "high",
  "cvss": 7.8,
  "cvssVector": "CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:H/I:N/A:H",
  "epss": 0.00164,
  "epssPercentile": 0.05635,
  "priority": "High",
  "priorityTier": 3,
  "exploited": false,
  "vendorExploited": false,
  "disclosed": false,
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