{
  "cveId": "CVE-2024-46848",
  "url": "https://patchblox.com/security/cve/CVE-2024-46848",
  "summary": "CVE-2024-46848 is fixed in 47 products on 1 platform, first by DEBIAN-CVE-2024-46848, released September 27, 2024. It is not reported as exploited. Patch Radar priority: Routine.",
  "title": "linux: In the Linux kernel, the following vulnerability has been resolved:  perf/x86/intel: Limit the period on Haswell  Run...",
  "description": "In the Linux kernel, the following vulnerability has been resolved:  perf/x86/intel: Limit the period on Haswell  Running the ltp test cve-2015-3290 concurrently reports the following warnings.  perfevents: irq loop stuck!   WARNING: CPU: 31 PID: 32438 at arch/x86/events/intel/core.c:3174   intel_pmu_handle_irq\u002B0x285/0x370   Call Trace:    \u003CNMI\u003E    ? __warn\u002B0xa4/0x220    ? intel_pmu_handle_irq\u002B0x285/0x370    ? __report_bug\u002B0x123/0x130    ? intel_pmu_handle_irq\u002B0x285/0x370    ? __report_bug\u002B0x123/0x130    ? intel_pmu_handle_irq\u002B0x285/0x370    ? report_bug\u002B0x3e/0xa0    ? handle_bug\u002B0x3c/0x70    ? exc_invalid_op\u002B0x18/0x50    ? asm_exc_invalid_op\u002B0x1a/0x20    ? irq_work_claim\u002B0x1e/0x40    ? intel_pmu_handle_irq\u002B0x285/0x370    perf_event_nmi_handler\u002B0x3d/0x60    nmi_handle\u002B0x104/0x330  Thanks to Thomas Gleixner\u0027s analysis, the issue is caused by the low initial period (1) of the frequency estimation algorithm, which triggers the defects of the HW, specifically erratum HSW11 and HSW143. (For the details, please refer https://lore.kernel.org/lkml/87plq9l5d2.ffs@tglx/)  The HSW11 requires a period larger than 100 for the INST_RETIRED.ALL event, but the initial period in the freq mode is 1. The erratum is the same as the BDM11, which has been supported in the kernel. A minimum period of 128 is enforced as well on HSW.  HSW143 is regarding that the fixed counter 1 may overcount 32 with the Hyper-Threading is enabled. However, based on the test, the hardware has more issues than it tells. Besides the fixed counter 1, the message \u0027interrupt took too long\u0027 can be observed on any counter which was armed with a period \u003C 32 and two events expired in the same NMI. A minimum period of 32 is enforced for the rest of the events. The recommended workaround code of the HSW143 is not implemented. Because it only addresses the issue for the fixed counter. It brings extra overhead through extra MSR writing. No related overcounting issue has been reported so far.",
  "published": "2024-09-27T13:15:16Z",
  "severity": "medium",
  "cvss": 5.5,
  "cvssVector": "CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:N/I:N/A:H",
  "epss": 0.00219,
  "epssPercentile": 0.12429,
  "priority": "Routine",
  "priorityTier": 4,
  "exploited": false,
  "vendorExploited": false,
  "disclosed": false,
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